Vlsi design and testing
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Vlsi design and testing questions with answers

161 multiple-choice questions. Open any question for its answer and explanation.

  1. Which of the following is true when inputs are controlled by equal amounts of charge?
  2. Switching speed of a MOS device depends on . . . . . . . .
  3. MOS transistor structure is . . . . . . . .
  4. In latch-up condition, parasitic component gives rise to . . . . . . . . conducting path.
  5. The isolated active areas are created by technique known as . . . . . . . .
  6. Increasing the transconductance . . . . . . . .
  7. Latch-up is the generation of . . . . . . . .
  8. Transconductance gives the relationship between . . . . . . . .
  9. If p-transistor is conducting and has small voltage between source and drain, then it is said to work in . . . . . . . .
  10. Interconnection pattern is made on . . . . . . . .
  11. The n-well collector is formed by . . . . . . . . .
  12. The current Ids . . . . . . . . as Vds increases.
  13. As die size shrinks, the complexity of making the photomasks . . . . . . . .
  14. In BiCMOS, MOS switches are used to . . . . . . . .
  15. Fast gate can be built by keeping . . . . . . . .
  16. If the gate is given sufficiently large charge, electrons will be attracted to . . . . . . . .
  17. CMOS technology is used in developing which of the following?
  18. What is the condition for non conducting mode?
  19. For depletion mode transistor, gate should be connected to . . . . . . . .
  20. The MOSFETS are arranged in this configuration to provide . . . . . . . .
  21. Increasing fan-out . . . . . . . . the propagation delay.
  22. Pass transistors are transistors used as . . . . . . . .
  23. What is the disadvantage of the MOS device?
  24. Ids depends on . . . . . . . .
  25. BiCMOS inverter requires high load current sourcing. A. True B. False